Booth Multiplier

Hard Verilog Math Asked at AMD

Implement a radix-2 Booth multiplier for two signed 8-bit numbers. Booth encoding halves the number of add operations for operands with runs of ones.

Constraints

Signed 8-bit inputs, signed 16-bit product.
Sequential implementation taking 8 cycles.
Assert done when the product is valid.
Must handle the most negative input correctly.
Use an arithmetic right shift on the accumulator.
No multiplication operator.

Starter codeVerilog

1module booth_mult (2    input wire clk,3    input wire rst,4    input wire start,5    input wire signed [7:0] a,6    input wire signed [7:0] b,7    output reg signed [15:0] product,8    output reg done9);10// TODO11endmodule