DeetCode.

Priority Encoder 8-to-3

Easy Verilog Control Asked at Marvell
Solve this problem

Design an 8-to-3 priority encoder with a valid output. The highest-numbered active input wins, and valid stays low when no input is active.

Constraints

  • 8-bit input, 3-bit encoded output, 1-bit valid.
  • Input 7 has the highest priority.
  • Output must be 0 with valid low when the input is all zeros.
  • Purely combinational.
  • Use a casez or a priority if-else chain, not a for loop.
Starter codeVerilog
1module priority_encoder (2    input wire [7:0] din,3    output reg [2:0] code,4    output reg valid5);6// TODO7endmodule