Software Delay Loop Calibration

Write a cycle-accurate busy-wait delay loop and document its exact cycle count, so a caller can convert microseconds to loop iterations for a known clock.

Constraints

• Iteration count in r0.
• The inner loop must take exactly 4 cycles per iteration on Cortex-M0.
• Must not be optimised away - this is hand-written assembly.
• Handle a count of zero by returning immediately.
• Document the cycle count of every instruction.
• No use of a hardware timer.