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Up-Down Counter with Load

Easy VHDL Control Asked at Infineon
Solve this problem

Design an 8-bit counter that can count up, count down, hold, or load a parallel value, with the mode selected by a two-bit control input.

Constraints

  • Modes: 00 hold, 01 up, 10 down, 11 load.
  • Synchronous active-high reset clears to zero.
  • Counter must wrap at both ends.
  • Output the current count.
  • Use numeric_std, not std_logic_arith.
  • Single clocked process.
Starter codeVHDL
1library ieee;2use ieee.std_logic_1164.all;3use ieee.numeric_std.all;4 5entity updown_counter is6    port (7        clk   : in  std_logic;8        rst   : in  std_logic;9        mode  : in  std_logic_vector(1 downto 0);10        din   : in  std_logic_vector(7 downto 0);11        count : out std_logic_vector(7 downto 0)12    );13end updown_counter;